Maxim Integrated MAX32660 - Table 7-16: DMA Source Reload Register; Table 7-17: DMA Destination Reload Register; Table 7-18: DMA Count Reload Register

MAX32660 User Guide
Maxim Integrated Page 83 of 195
Table 7-16: DMA Source Reload Register
DMA Source Reload Register
DMAn_SRC_RLD
[0x0114]
Bits
Name
Access
Reset
Description
31
-
RO
0
Reserved for Future Use
Do not modify this field.
30:0
src_rld
R/W
0
Source Address Reload Value
If DMAn_CFG.rlden = 1, then the value of this register is loaded into DMAn_SRC upon a
CTZ condition.
Table 7-17: DMA Destination Reload Register
DMA Destination Reload Register
DMAn_DST_RLD
[0x0118]
Bits
Name
Access
Reset
Description
31
-
RO
0
Reserved for Future Use
Do not modify this field.
30:0
dst_rld
R/W
0
Destination Address Reload Value
If DMAn_CFG.rlden = 1, then the value of this register is loaded into DMAn_DST upon a
CTZ condition.
Table 7-18: DMA Count Reload Register
DMA Count Reload Register
DMAn_CNT_RLD
[0x011C]
Bits
Name
Access
Reset
Description
31
rlden
R/W
0
Reload Enable.
Enables automatic loading of the DMAn_SRC, DMAn_DST, and DMAn_CNT registers
when a CTZ event occurs.
Set this bit after the address reload registers are programmed.
This bit is automatically cleared to 0 when reload occurs.
0: Reload disabled
1: Reload enabled
Note: This bit is also seen in the DMAn_CFG register.
30:24
-
RO
0
Reserved for Future Use
Do not modify this field.
23:0
cnt_rld
R/W
0
Count Reload Value.
If DMAn_CNT_RLD.rlden = 1, then the value of this register is loaded into DMAn_CNT
upon a CTZ condition.