Maxim Integrated MAX32660 - Table of Contents

MAX32660 User Guide
Maxim Integrated Page 8 of 195
List of Figures
Figure 2-1: MAX32660 High Level Block Diagram ................................................................................................... 14
Figure 3-1: Code Memory Mapping ........................................................................................................................ 15
Figure 3-2: Data Memory Map ................................................................................................................................ 16
Figure 4-1: Clock Tree Diagram ............................................................................................................................... 24
Figure 7-1: DMAC Block Diagram ............................................................................................................................ 71
Figure 9-1. RTC Block Diagram ................................................................................................................................ 97
Figure 10-1: One-Shot Mode Diagram .................................................................................................................. 107
Figure 10-2: Continuous Mode Diagram ............................................................................................................... 109
Figure 10-3: Counter Mode Diagram ..................................................................................................................... 111
Figure 10-4: Capture Mode Diagram ..................................................................................................................... 115
Figure 10-5: Counter Mode Diagram ..................................................................................................................... 117
Figure 10-6: Gated Mode Diagram ........................................................................................................................ 119
Figure 11-1: Watchdog Timer Block Diagram ........................................................................................................ 126
Figure 12-1: The Roles of I
2
C Devices and the Direction the I
2
C Signals ................................................................ 132
Figure 12-2: I
2
C Write Data Transfer ..................................................................................................................... 134
Figure 12-3: I
2
C Specification Minimum and Maximum Clock Parameters for Standard and Fast Mode ............ 136
Figure 12-4: I
2
C Clock Period ................................................................................................................................. 142
Figure 13-1: SPI0 Block Diagram ............................................................................................................................ 159
Figure 13-2: 4-Wire SPI Connection Diagram ........................................................................................................ 160
Figure 13-3: 3-Wire SPI Connection Diagram ........................................................................................................ 161
Figure 13-4: SCK Clock Rate Control ...................................................................................................................... 163
Figure 13-5: SPI Clock Polarity ............................................................................................................................... 164
Figure 13-6. SPI Timing (SPI0_CTRL2.clk_pha = 0) ................................................................................................. 165
Figure 13-7. SPI Timing (SPI0_CTRL2.clk_pha = 1) ................................................................................................. 166
Figure 13-8: Three-Wire SPI Read ......................................................................................................................... 167
Figure 13-9: Three-Wire SPI Write ........................................................................................................................ 167
Figure 14-1. SPIMSS Block Diagram ....................................................................................................................... 179
Figure 14-2: 4-Wire SPI Connection Diagram ........................................................................................................ 180
Figure 14-3: I
2
S Audio Data in Standard I
2
S Operation .......................................................................................... 186
Figure 14-4: I
2
S Mode (i2s_en=1, i2s_lj=1) ............................................................................................................ 186