MAX32660 User Guide
Maxim Integrated Page 154 of 195
I
2
C Transmit Control Register 0
TX FIFO Preload Mode Enable
0: Normal operation. An address match in Slave Mode, or a General Call address
match, will flush and lock the TX FIFO so it cannot be written and set
I2Cn_INTFL0.txloi.
1: TX FIFO Preload Mode. An address match in Slave Mode, or a General Call
address match, will not lock the TX FIFO and will not set I2Cn_INTFL0.txloi. This
allows firmware to preload data into the TX FIFO. The status of the I
2
C is
controllable at I2Cn_TXCTRL1.txrdy.
Table 12-14: I
2
C Transmit Control Registers 1
I
2
C Transmit Control Register 1
Reserved for Future Use
Do not modify this field.
Transmit FIFO Byte Count Status
Contains the number of bytes remaining in the TX FIFO
Reserved for Future Use
Do not modify this field.
TX FIFO Auto Flush Disable for NACK
Setting this field to 1 disables the TX FIFO Automatic Flush when a NACK is received
at the end of a slave transaction.
0: The TX FIFO is automatically flushed if a NACK is received at the end of a slave
transaction.
1: The TX FIFO is not flushed when a NACK is received at the end of a slave
transaction.
Note: This field is valid for slave mode operation only and is ignored if the I
2
C mode
is set to master.
TX FIFO Auto Flush Disable for Slave Address Match
Setting this field to 1 disables the TX FIFO Automatic Flush when a Slave Address
Match occurs.
0: The TX FIFO is automatically flushed on a Slave Address Match.
1: The TX FIFO is not flushed on a Slave Address Match.
Note: This field is valid for slave mode operation only and is ignored if the I
2
C mode
is set to master.
Reserved for Future Use
Do not modify this field.
TX FIFO Auto Flush Disable on General Call Address Match
Setting this field to 1 disables the TX FIFO Automatic Flush when a General Call
Address Match occurs.
0: The TX FIFO is automatically flushed on a General Call Address Match.
1: The TX FIFO is not flushed on a General Call Address Match.
Note: This field is valid for slave mode operation only and is ignored if the I
2
C mode
is set to master.