MAX32660 User Guide
Maxim Integrated Page 84 of 195
8 UART
The MAX32660 microcontroller provides up to two industry-standard UART ports which can communicate with external
devices using standard serial communications protocols. The UARTs are full-duplex Universal Asynchronous
Receiver/Transmitter (UART) serial ports. Both UARTs, UART0 and UART1, support identical functionality and registers
unless specifically noted otherwise. For simplicity, the UARTs are referenced in the documentation as UARTn where n = 0 or
1. The registers for each UART are documented showing an offset address, which is identical for each UART instance. To
address.
8.1.1 Features:
• Flexible baud rate generation up to 4Mbps
• Programmable character size, 5, 6, 7, or 8-bits
• Stop bit settings of 1, 1.5, or 2-bits
• Parity settings of even, odd, mark (always 1), space (always 0), and no parity
• Automatic parity error detection with selectable parity bias
• Automatic framing error detection
• Separate 32-byte deep transmit and receive FIFOs
• Flexible interrupt conditions
• Hardware flow control for RTS and CTS
• Null modem support
• Break generation and detection
• Wakeup from DEEPSLEEP on UART edge with no character loss
• RX Timeout detection
8.2 UART Frame Characters
Character sizes of 5 to 8 bits are supported. The field UARTn_CTRL0.charsize is used to select the character size.
Stop bit support includes 1, 1.5, and 2 stop bits selected with the register field UARTn_CTRL0.
Parity support includes even, odd, mark, space or none. For no parity, set field UARTn_CTRL0.parity_en to 0. For all other
parity options, select one of the four parity options using the UARTn_CTRL0.parity_mode field and enable parity
(UARTn_CTRL0.parity_en=1). Parity can be based on the number of 1 bits or 0 bits in the receive characters as set in the
register bit UARTn_CTRL0.parity_lvl.
Break frames are transmitted by setting the field UARTn_CTRL0.break to 1. A break sets all bits in the frame to 0.
When a break frame is received, two interrupts are available, UARTn_INT_FL.break is set to 1 when the first received break
character is received and UARTn_INT_FL.last_break is set when the last break character is received. This prevents the
system from being overloaded with multiple interrupts that could occur after the first break character and up to the Nth
break character received.
Note: A break character does not set the frame error flag because breaks are not valid UART characters.
To Next Page
Loading...
