Items and operators of the PSRmodular Software
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Figure 5-178 Example of a safe output with correct feedback signal (left) / incorrect feed-
back signal (middle and right)
Parameters
External K delay Specification of the time period in which the “F
BK_K” signal must be in the correct state
(50 ms ... 20 s in 50 ms increments).
Enable Clear When this option is selected, an additional “Clear” input is activated. If the “Clear” input is
set to logic “1”, the error is reset once the cause of the error has been rectified. This means
that it is not necessary to reset the base module or switch off the system.
Figure 5-179 Application example for the EDM function block
FBK
E
RROR
OUTPUT
FBK
E
RROR
OUTPUT
t_fbk
t_fbk