Remote Control Basics
R&S
®
SMB100A
238Operating Manual 1407.0806.32 ─ 13
The ESE corresponds to the ENABle part of a SCPI register. If a bit is set in the ESE and
the associated bit in the ESR changes from 0 to 1, the ESB bit in the STB is set. The ESE
register can be set using the command *ESE and read using the command *ESE?.
Table 6-4: Meaning of the bits used in the event status register
Bit No. Meaning
0 Operation Complete
This bit is set on receipt of the command *OPC exactly when all previous commands have been
executed.
1 Not used
2 Query Error
This bit is set if either the controller wants to read data from the instrument without having sent a
query, or if it does not fetch requested data and sends new instructions to the instrument instead.
The cause is often a query which is faulty and hence cannot be executed.
3 Device-dependent Error
This bit is set if a device-dependent error occurs. An error message with a number between -300
and -399 or a positive error number, which denotes the error in greater detail, is entered into the
error queue.
4 Execution Error
This bit is set if a received command is syntactically correct but cannot be performed for other
reasons. An error message with a number between -200 and -300, which denotes the error in
greater detail, is entered into the error queue.
5 Command Error
This bit is set if a command is received, which is undefined or syntactically incorrect. An error
message with a number between -100 and -200, which denotes the error in greater detail, is
entered into the error queue.
6 User Request
This bit is set when the instrument is switched over to manual control.
7 Power On (supply voltage on)
This bit is set on switching on the instrument.
6.5.5 Questionable Status Register (STATus:QUEStionable)
This register contains information on questionable instrument states. Such states may
occur when the instrument is not operated in compliance with its specifications. To read
the register, use the query commands STAT:QUEST:COND? or
STAT:QUEST[:EVEN]?.
Table 6-5: Meaning of the bits used in the questionable status register
Bit No. Meaning
0-15 not used
Status Reporting System
To Next Page
Loading...
