Anritsu ML2437A - ESE? (Return Event Status Register Enable Mask); ESR? Event Status Register Request; IDN? (Request Device Identification); OPC (Operations Complete)

ML24xxA Native Commands GPIB Operation
8-14 PN: 10585-00001 Rev. P ML2437A/38A OM/PM
*ESE? (Return Event status register enable mask)
*ESR? Event status register request
*IDN? (Request device identification)
*OPC (Operations complete)
*OPC? (Operations complete Output '1')
Syntax: *ESE?
Remarks: Returned format: <unsigned character>
When converted to an 8-bit binary number, this byte yields the bit
settings of the register.
Syntax: *ESR?
Remarks: Return the value of the standard event status register. Afterwards the
event status register are cleared. The returned format is: <unsigned
character>. When converted to a 8-bit binary number, this byte yields
the bit settings of the register.
Syntax: *IDN?
Remarks: Returned format:
<Company name>,<model>,<serial>,<firmware version>
Syntax: *OPC
Remarks: The ML243xA generates the OPC event in the standard event status
register when all pending operations have finished. An operation is
complete when all input messages before the command have been
completed and any responses have been read out of the output buffer.
Example: RGH A, 1; RGH B, 3; *OPC
Will set the Operations Complete bit in the Event Status Register once
the Range Hold commands have completed.
Syntax: *OPC?
Remarks: Places a single ASCII character '1' on the GPIB output queue when the
conditions for the *OPC command are met. An operation is complete
when all input messages before the command have been completed and
any responses have been read out of the output buffer.
Example: RGH A, 1; RGH B, 2; *OPC?
Returns a ‘1’ on the GPIB output when it has finished setting the range
hold commands.