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Coprocessor Interface

4.7 Undefined instructions

Undefined instructions are treated by the ARM7TDMI processor as coprocessor

instructions. All coprocessors must be absent, CPA and CPB must be HIGH, when an

undefined instruction is presented. The ARM7TDMI processor takes the undefined

instruction trap.

For undefined instructions to be handled correctly, any coprocessors in a system must

give the absent response (CPA and CPB HIGH) to an undefined instruction. This

enables the core to take the undefined instruction exception.

The coprocessor must check bit [27] of the instruction to differentiate between the

following instruction types:

• undefined instructions have 0 in bit [27]

• coprocessor instructions have 1 in bit [27].

Coprocessor instructions are not supported in the Thumb instruction set but undefined

instructions are. All coprocessors must monitor the state of the TBIT output from

ARM7TDMI core. When the ARM7TDMI core is in Thumb state, coprocessors must

drive CPA and CPB HIGH, and the instructions seen on the data bus must be ignored.

In this way, coprocessors do not execute Thumb instructions in error, and all undefined

instructions are handled correctly.

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