ARM ARM7TDMI - Table 3-5 Ntrans Encoding

Memory Interface
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 3-13
3.4.5 nTRANS
The nTRANS output conveys information about the transfer. An MMU can use this
signal to determine whether an access is from a privileged mode or User mode. This
signal can be used with nOPC to implement an access permission scheme. The
meaning of nTRANS is listed in Table 3-5.
More information relevant to the nTRANS signal and security is provided in Privileged
mode access on page 3-31.
3.4.6 LOCK
LOCK is used to indicate to an arbiter that an atomic operation is being performed on
the bus. LOCK is normally LOW, but is set HIGH to indicate that a SWP or SWPB
instruction is being performed. These instructions perform an atomic read/write
operation, and can be used to implement semaphores.
3.4.7 TBIT
TBIT is used to indicate the operating state of the ARM7TDMI processor. When in:
• ARM state, the TBIT signal is LOW
• Thumb state, the TBIT signal is HIGH.
Note
Memory systems do not usually have to use TBIT because MAS[1:0] indicates the size
of the instruction required.
Table 3-5 nTRANS encoding
nTRANS Mode
0User
1 Privileged