ARM ARM7TDMI - Table 1-3 Addressing Modes

Introduction
1-16 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
The addressing modes are listed with their types and mnemonics Table 1-3.
Table 1-3 Addressing modes
Addressing mode
Type or
addressing mode
Mnemonic or stack type
Mode 2 <a_mode2> Immediate offset
[Rn, #+/-12bit_Offset]
Register offset [Rn, +/-Rm]
Scaled register offset [Rn, +/-Rm, LSL #5bit_shift_imm]
[Rn, +/-Rm, LSR #5bit_shift_imm]
[Rn, +/-Rm, ASR #5bit_shift_imm]
[Rn, +/-Rm, ROR #5bit_shift_imm]
[Rn, +/-Rm, RRX]
Pre-indexed offset -
Immediate
[Rn, #+/-12bit_Offset]!
Register [Rn, +/-Rm]!
Scaled register [Rn, +/-Rm, LSL #5bit_shift_imm]!
[Rn, +/-Rm, LSR #5bit_shift_imm]!
[Rn, +/-Rm, ASR #5bit_shift_imm]!
[Rn, +/-Rm, ROR #5bit_shift_imm]!
[Rn, +/-Rm, RRX]!
Post-indexed offset -
Immediate
[Rn], #+/-12bit_Offset
Register [Rn], +/-Rm
Scaled register [Rn], +/-Rm, LSL #5bit_shift_imm
[Rn], +/-Rm, LSR #5bit_shift_imm
[Rn], +/-Rm, ASR #5bit_shift_imm
[Rn], +/-Rm, ROR #5bit_shift_imm
[Rn, +/-Rm, RRX]