Debug Interface
5-8 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
• Entry into debug state on debug request on page 5-9.
Figure 5-3 Debug state entry
Entry into debug state on breakpoint
The ARM7TDMI core marks instructions as being breakpointed as they enter the
instruction pipeline, but the core does not enter debug state until the instruction reaches
the Execute stage.
Breakpointed instructions are not executed. Instead, the processor enters debug state.
Depending on whether you have set bit [4] in the debug control register, the core
instruction processing stops, or an abort exception is executed (Abort on page 2-19).
When you examine the internal state, you see the state before the breakpointed
instruction.
When your examination is complete, the breakpoint must be removed. This is usually
handled automatically by the debugger which also restarts program execution from the
previously-breakpointed instruction.
Note
When a breakpointed conditional instruction reaches the Execute stage of the pipeline,
the breakpoint is always taken, regardless of whether the condition is met.
Memory cycles Internal cycles
MCLK
A[31:0]
D[31:0]
BREAKPT
DBGACK
nMREQ
SEQ
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