ARM ARM7TDMI - Figure 1-4 ARM7 TDMI Processor Functional Diagram

Introduction
1-10 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
Figure 1-4 ARM7TDMI processor functional diagram
ARM7TDMI
MCLK
nWAIT
ECLK
Clocks and
timing
nIRQ
nFIQ
ISYNC
Interrupts
nRESET
BUSEN
HIGHZ
BIGEND
nENIN
nENOUT
nENOUTI
ABE
ALE
DBE
TBE
BUSDIS
ECAPCLK
Bus
controls
APE
nHIGHZ
SCREG[3:0]
TCK
TMS
TDI
nTRST
TDO
TAPSM[3:0]
IR[3:0]
nTDOEN
TCK1
TCK2
Boundary
scan
A[31:0]
DOUT[31:0]
nMREQ
SEQ
nRW
MAS[1:0]
BL[3:0]
Memory
interface
D[31:0]
DIN[31:0]
LOCK
nTRANS
ABORT
Memory
management
interface
nOPC
nCPI
CPA
CPB
Coprocessor
interface
Boundary scan
control signals
11
nM[4:0]
Processor mode
Processor state
TBIT
DBGRQ
INSTRVALID
BREAKPT
DBGACK
nEXEC
EXTERN1
EXTERN0
DBGEN
RANGEOUT0
RANGEOUT1
DBGRQI
COMMRX
COMMTX
Debug
DBGRQ
VDD
VSS
Power