ARM ARM7TDMI User Manual

Instruction Cycle Timings
6-4 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
6.2 Branch and branch with link
A branch instruction calculates the branch destination in the first cycle, while
performing a prefetch from the current PC. This prefetch is done in all cases because,
by the time the decision to take the branch has been reached, it is already too late to
prevent the prefetch.
During the second cycle a fetch is performed from the branch destination, and the return
address is stored in Register r14 if the link bit is set.
The third cycle performs a fetch from the destination +L, refilling the instruction
pipeline. If the instruction is a branch with link (R14 is modified) four is subtracted from
R14 to simplify the return instruction from
SUB PC,R14,#4 to MOV PC,R14 . This enables
subroutines to push R14 onto the stack and pop directly into PC upon completion.
The cycle timings are listed in Table 6-1 where:
• pc is the address of the branch instruction
• alu is the destination address calculated by the ARM7TDMI core
• (alu) is the contents of that address.
Note
Branch with link is not available in Thumb state.
Table 6-1 Branch instruction cycle operations
Cycle Address MAS[1:0] nRW Data nMREQ SEQ nOPC
1 pc+2L i 0 (pc+2L) 0 0 0
2 alu i 0 (alu) 0 1 0
3 alu+L i 0 (alu+L) 0 1 0
alu+2L

ARM ARM7TDMI Specifications

General

Brand	ARM
Model	ARM7TDMI
Category	Computer Hardware
Language	English