ARM ARM7TDMI User Manual

Memory Interface
3-16 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
Figure 3-10 SRAM compatible address timing
Note
If ALE is to be used to change address timing, then you must tie APE HIGH. Similarly,
if APE is to be used, ALE must be tied HIGH.
You can obtain better system performance when the address pipeline is enabled with
APE HIGH. This allows longer time for address decoding.
MCLK
nMREQ
SEQ
APE
D[31:0]
ALE
A[31:0]

ARM ARM7TDMI Specifications

General

Data Width	32-bit
Cores	1
MIPS per MHz	0.9
On-chip Debug	Yes
Instruction Set	ARM
Pipeline Stages	3
Operating Voltage	Implementation dependent
Manufacturing Process	Implementation dependent