ARM ARM7TDMI - Thumb Branch with Link

Instruction Cycle Timings
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 6-5
6.3 Thumb branch with link
A Thumb Branch with Link operation consists of two consecutive Thumb instructions.
See the ARM Architecture Reference Manual for more information.
The first instruction acts like a simple data operation to add the PC to the upper part of
the offset, storing the result in Register r14, LR.
The second instruction which takes a single cycle acts in a similar fashion to the ARM
state branch with link instruction. The first cycle therefore calculates the final branch
destination whilst performing a prefetch from the current PC.
The second cycle of the second instruction performs a fetch from the branch destination
and the return address is stored in R14.
The third cycle of the second instruction performs a fetch from the destination +2,
refilling the instruction pipeline and R14 is modified, with 2 subtracted from it, to
simplify the return to
MOV PC, R14 . This makes the PUSH {..,LR} ; POP {..,PC} type of
subroutine work correctly.
The cycle timings of the complete operation are listed in Table 6-2 where:
• pc is the address of the first instruction of the operation.
Table 6-2 Thumb long branch with link
Cycle Address MAS[1:0] nRW Data nMREQ SEQ nOPC
1 pc+4 1 0 (pc+4) 0 1 0
2 pc+6 1 0 (pc+6) 0 0 0
3alu 1 0(alu)0 10
4alu+21 0(alu+2)0 10
alu+4