Debug in Depth
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. B-43
B.12.1 Programming and reading watchpoint registers
A watchpoint register is programmed by shifting data into the EmbeddedICE-RT scan
chain, scan chain 2. The scan chain is a 38-bit shift register comprising:
• a 32-bit data field
• a 5-bit address field for watchpoint register writes
• a read/write bit.
This setup is shown in Figure B-7.
Figure B-7 EmbeddedICE-RT block diagram
The data to be written is shifted into the 32-bit data field. The address of the register is
shifted into the 5-bit address field. The read/write bit is set.
Read/write
0
4
31
0
Data
Scan chain
register
Address
Address
decoder
TDI TDO
Value Mask Comparator
Control
D[31:0]
A[31:0]
+
Breakpoint
condition
Watchpoint registers and comparators
Update
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