ARM ARM7TDMI - Table 3-7 Read Accesses

Memory Interface
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 3-27
Note
For subword reads the value is placed in the ARM register in the least significant bits
regardless of the byte lane used to read the data. For example, a byte read on A[1:0] =
01 in a little-endian system means that the byte is read on bits D[15:8] but is placed in
the ARM register bits [7:0].
Writes
When the ARM7TDMI processor performs a byte or halfword write, the data being
written is replicated across the data bus, as shown in Figure 3-20 on page 3-28. The
memory system can use the most convenient copy of the data.
A writable memory system must be capable of performing a write to any single byte in
the memory system. This capability is required by the ARM C Compiler and the debug
tool chain.
Table 3-7 Read accesses
Access type MAS[1:0] A[1:0] Little-endian BIGEND = 0 Big-endian BIGEND = 1
Word 10 XX D[31:0] D[31:0]
Halfword 01 0X D[15:0] D[31:16]
01 1X D[31:16] D[15:0]
Byte 00 00 D[7:0] D[31:24]
00 01 D[15:8] D[23:16]
00 10 D[23:16] D[15:8]
00 11 D[31:24] D[7:0]