ARM ARM7TDMI - Figure 3-20 Data Replication

Memory Interface
3-28 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
Figure 3-20 Data replication
0
A B C D
781516
2331 24
ARM
register
Half word write (register [15:0])
CD
CDCD
D[31:16] D[15:0]
Word write (register [31:0])
ABCD
ABCD
D[31:0]
Byte write (register [7:0])
D
DDDD
D[31:24]
Memory
interface
D[15:8]D[23:16] D[7:0]
Bits
Memory
interface
Memory
interface