Introduction
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 1-11
1.4 Instruction set summary
This section provides a description of the instruction sets used on the ARM7TDMI
processor.
This section describes:
• Format summary
• ARM instruction summary on page 1-13
• Thumb instruction summary on page 1-20.
1.4.1 Format summary
This section provides a summary of the ARM, and Thumb instruction sets:
• ARM instruction summary on page 1-13
• Thumb instruction summary on page 1-20.
A key to the instruction set tables is provided in Table 1-1.
The ARM7TDMI processor uses an implementation of the ARMv4T architecture. For
a complete description of both instruction sets, see the ARM Architecture Reference
Manual.
The ARM instruction set formats are shown in Figure 1-5 on page 1-12.
Table 1-1 Key to tables
Type Description
{cond}
Condition field, see Table 1-6 on page 1-19.
<Oprnd2>
Operand2, see Table 1-4 on page 1-18.
{field}
Control field, see Table 1-5 on page 1-19.
S Sets condition codes, optional.
B Byte operation, optional.
H Halfword operation, optional.
T Forces address translation. Cannot be used with pre-indexed addresses.
Addressing modes See Addressing modes on page 1-15.
#32bit_Imm
A 32-bit constant, formed by right-rotating an 8-bit value by an even number of bits.
<reglist>
A comma-separated list of registers, enclosed in braces ( { and } ).
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