ARM ARM7TDMI - Table 7-19 Reset Period Timing Parameters; Figure 7-19 Reset Period Timing; Figure 7-20 Output Enable and Disable Times Due to HIGHZ TAP Instruction

AC and DC Parameters
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 7-17
Figure 7-19 Reset period timing
The timing parameters used in Figure 7-19 are listed in Table 7-19.
Figure 7-20 Output enable and disable times due to HIGHZ TAP instruction
T
bsoh
TDO hold time from TCKfMinimum
T
bssh
I/O signal setup from TCKrMinimum
T
bsss
I/O signal setup to TCKr, Minimum
Table 7-18 Scan general timing parameters (continued)
Symbol Parameter Parameter type
T
bsr
nTRST
T
rstl
nRESET
T
rstd
D[31:0]
DBGACK
nCPI
nENOUT
nEXEC
nMREQ
SEQ
Table 7-19 Reset period timing parameters
Symbol Parameter Parameter type
T
bsr
nTRST reset period Minimum
T
rstd
nRESETf to D[31:0], DBGACK, nCPI, nENOUT, nEXEC, nMREQ, SEQ valid Maximum
T
rstl
nRESET LOW for guaranteed reset Minimum
T
bsz
T
bse
TCK
A[ ]
D[ ]