ARM ARM7TDMI User Manual

Instruction Cycle Timings
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 6-9
6.6 Multiply and multiply accumulate
The multiply instructions use special hardware that implements integer multiplication
with early termination. All cycles except the first are internal.
The cycle timings are listed in the following tables:
• multiply instruction cycle operations are listed in Table 6-5
• multiply accumulate instruction cycle operations are listed in Table 6-6
• multiply long instruction cycle operations are listed in Table 6-7 on page 6-10
• multiply accumulate long instruction cycle operations are listed in Table 6-8 on
page 6-10.
In Table 6-5 to Table 6-8 on page 6-10:
• m is the number of cycles required by the multiplication algorithm. See
Instruction speed summary on page 6-29.
Table 6-5 Multiply instruction cycle operations
Cycle Address nRW MAS[1:0] Data nMREQ SEQ nOPC
1 pc+2L 0 i (pc+2L) 1 0 0
2pc+3L0i - 1 01
•pc+3L0i - 1 01
mpc+3L0i - 1 01
m+1 pc+3L 0 i - 0 1 1
pc+3L
Table 6-6 Multiply accumulate instruction cycle operations
Cycle Address nRW MAS[1:0] Data nMREQ SEQ nOPC
1 pc+8 0 2 (pc+8) 1 0 0
2pc+802 - 1 01
•pc+1202 - 1 01
mpc+1202 - 1 01

ARM ARM7TDMI Specifications

General

Brand	ARM
Model	ARM7TDMI
Category	Computer Hardware
Language	English