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Freescale Semiconductor MC68881 - Page 131

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FMOVECR
Move
co°,,..,.o. FMOVECR
Instruction Fields:
Coprocessor ID Field -- Specifies which coprocessor in the system is to
execute
this
instruction. Freescale assemblers default to ID = 1 for the FPCP.
Destination Register Field -- Specifies the destination floating-point data register, FPn.
ROM Offset Field -- Specifies the offset into the FPCP on-chip constant ROM where
the desired constant is located. The offsets for the available constants are:
Offset Constant
$00
$0B Log10(2)
$0C e
S0D Log2(e)
$0E Logl0(e)
$0F 0.0
$30 ln(2)
$31 ln(10)
$32 10 o
$33 101
$34 102
$35 104
$36 108
$37 10
TM
$38 1032
$39 1064
$3A 10126
$3B 10256
$3C 10512
$3D 10
TM
$3E 102048
$3F 104096
The on-chip ROM contains other constants useful only to the on-chip microcode rou-
tines. The values contained at offsets other than those defined above are reserved for
the use of Freescale, and may be different on various mask sets of the FPCP.
MC68881/MC68882 USER'S MANUAL FREESCALE
4-73

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