4
FMOVEM Move Multiple Data Registers FMOVEM
Operation:
Register List i Destination
Source $ Register List
Assembler
Syntax:
FMOVEM.X <list>,<ea>
FMOVEM.X Dn,<ea>
FMOVEM.X <ea>,<list>
FMOVEM.X <ea>,Dn
<list>
A list of any combination of the eight floating-point data
registers, with individual register names separated by a
slash (/); and/or contiguous blocks of registers specified
by the first and last register names separated by a dash
(-).
Attributes:
Format-- (Extended)
Description:
Moves one or more extended precision numbers to or from a list of floating-
point data registers. No conversion or rounding is performed during this operation,
and the FPSR is not affected by the instruction. This instruction does not cause pending
exceptions (other than protocol violations) to be reported to the main processor.
Any combination of the eight floating-point data registers can be transferred, with the
selected registers specified by a user-supplied mask. This mask is an 8-bit number,
where each bit corresponds to one register; if a bit is set in the mask, that register is
moved. The register select mask may be specified as a static value contained in the
instruction, or a dynamic value in the least significant 8-bits of a main processor data
register (the remaining bits of the register are ignored).
FMOVEM allows three types of addressing modes: the control modes, the predecre-
ment mode, or the postincrement mode. If the effective address is one of the control
addressing modes, the registers are transferred between the FPCP and memory start-
ing at the specified address and up through higher addresses. The order of the transfer
is from FP7-FP0.
If the effective address is the predecrement mode, only a register-to-memory operation
is allowed. The registers are stored starting at the address contained in the address
register and down through lower addresses. Before each register is stored, the address
register is decremented by 12 (the size of an extended precision number in memory}
and the floating-point data register is then stored at the resultant address. When the
operation is complete, the address register points to the image of the last floating-
point data register stored. Each register is stored in the format described in SECTION
30PERAND DATA FORMATS, with the most significant byte of the register image
stored at the lowest address, and the least significant byte at the highest address. The
order of the transfer is from FP7-FP0.
If the effective address is the postincrement mode, only a memory-to-register oper-
ation is allowed. The registers are loaded starting at the specified address and up
FREESCALE
4-74
MC68881/MC68882 USER'S MANUAL
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