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Freescale Semiconductor MC68881 - Page 134

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4
FMOVEM Move Multiple Data Registers FMOVEM
Addressing Mode
Dn
An
(An)
(An) +
- (An)
(dl6,An)
(ds,An,Xn)
(bd,An,Xn)
([bd,An,Xn],od)
([bd,An],Xn,od)
Register-to-Memory
Mode Register
010 reg. number:An
100 reg. number:An
101 reg. number:An
110 reg. number:An
110 reg. number:An
110 reg. number:An
110 reg. number:An
Addressing Mode
(xxxl.W
(xxx}.L
#<data>
(d16,PC}
(ds,PC,Xn}
(bd,PC,Xn)
([bd,PC,Xn],od)
([bd.PC],Xn,od)
Mode
Register
111 000
111 001
-- m
dr Field -- Specifies the direction of the transfer.
0 -- Move the listed registers from memory to the FPCP.
1 -- Move the listed registers from the FPCP to memory.
Mode Field -- Specifies the type of the register list and addressing mode.
00
--
Static register list, predecrement addressing mode.
01 -- Dynamic register list, predecrement addressing mode.
10 -- Static register list, postincrement or control addressing mode.
11 -- Dynamic register list, postincrement or control addressing mode.
Register List Field:
Static list -- contains the register select mask; if a register is to be moved, the
corresponding bit in the mask is set as shown below, otherwise it is clear.
Dynamic list -- contains the main processor data register number, rrr, as shown
below:
Register List Format
Static, -(An) -- FP7 FP6 FP5 FP4 FP3 FP2 FP1 FP0
Static, (An)+ or
Control -- FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7
Dynamic -- 0 r r r 0 0 0 0
The format of the dynamic list mask is the same as for the static list and is contained
in the least significant eight bits of the specified main processor data register.
Programming Note:
This instruction provides a very useful feature, dynamic register list
specification, that can significantly enhance system performance. If the calling con-
ventions used for procedure calls utilize the dynamic register list feature, the number
of floating-point data registers saved and restored can be reduced. A minimum of six
bus cycles is required to load or save a floating-point data register (more if the memory
address is not long word aligned). Thus, a minimum of 36 clock cycles (2x6 bus
cycles x 3 clocks per bus cycle) is eliminated from the procedure call and return over-
head for each register not saved and restored unnecessarily.
In order to utilize the dynamic register specification feature of the FMOVEM instruction,
both the calling and the called procedures must be written to communicate information
about register usage. When one procedure calls another, a register mask must be
passed to the called procedure to indicate which registers must not be altered upon
return to the calling procedure. The called procedure then saves only those registers
FREESCALE
4-76
MC68881/MC68882 USER'S MANUAL

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