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Freescale Semiconductor MC68881 - Page 140

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4
FNEG
Negate
FNEG
Operation:
-(Source) J) FPn
Assembler
FNEG.<fmt> <ea>,FPn
Syntax:
FNEG.X FPm,FPn
FNEG.X FPn
Attributes:
Format = (Byte, Word, Long, Single, Double, Extended, Packed)
Description:
Converts the source operand to extended precision (if necessary) and in-
verts the sign of the mantissa. Stores the result in the destination floating-point data
register.
Operation Table:
Source I In
Range Zero
Infinity
Destination ~ + - + - +
Result ~_ Negate -0.0 -0.0 -inf
NOTE: If the source operand is a NAN, refer to 4.5.4 NANs for more information.
- inf
Status Register:
Condition Codes:
Quotient Byte:
Exception Byte:
Affected as described in 4.5.5.1 SETrlNG FLOATING-POINT
CONDITION CODES
Not affected
BSUN
SNAN
OPERR
OVFL
UNFL
DZ
INEX2
INEX1
Cleared
Refer to 4.5.4
NANs.
Cleared
Cleared
If source is an extended precision denormal-
ized number, refer to 6.1.5 Underflow; cleared
otherwise.
Cleared
Cleared
If <fmt> is Packed, refer to 6.1.8 Inexact
Result
on Decimal Input; cleared otherwise.
Accrued Exception Byte: Affected as described in 6.1.10 IEEE Exception and Trap Com-
patibility
FREESCALE
4-82
MC68881/MC68882 USER'S MANUAL

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