EasyManua.ls Logo

Freescale Semiconductor MC68881 - Page 144

Default Icon
409 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
4
FREM
,EEE Remainder
FREIVi
Operation:
Assembler
Syntax:
Attributes:
Description:
IEEE Remainder of (FPn (รท) Source) J FPn
FREM.<fmt> <ea>,FPn
FREM.X FPm,FPn
Format= (Byte, Word, Long, Single, Double, Extended, Packed)
Converts the source operand to extended precision (if necessary) and
cal-
culates the modulo remainder of the number in the destination floating-point data
register, using the source operand as the modulus. Stores the result in the destination
floating-point data register, and stores the sign and seven least significant bits of the
quotient in the FPSR quotient byte (the quotient is the result of FPn (-) Source). The
IEEE remainder function is defined as:
FPn - (Source x N)
where:
N = INT(FPn ( + ) Source) in the round-to-nearest mode
The FREM function is not defined for a source o perand equal to zero orfor a destination
operand equal to infinity. Note that this function is not the same as the FMOD instruc-
tion, which uses the round-to-zero mode and thus returns a remainder that is different
from the remainder required by the
IEEE Specification for Binary Floating-Point Arith-
metic.
Operation Table:
Source
Destination
+
In Range
In Range
+
Zero
-',F
Infinity
-F
IEEE Remainder NAN 1 FPn 2
+0.O -~0.0
Zero ' NAN 1
- -0.0 -0,0
Infinity + NAN 1 NAN 1 NAN 1
NOTES:
1. Sets the OPERR bit in the FPSR exception byte.
2. Returns the value of FPn before the operation. However, the result is processed by the normal
instruction termination procedure to round it as required. Thus, an underflow and or inexact
result may occur if the rounding precision has been changed to a smeller size s~nce the FPn
value was loaded.
3, If either operand is a NAN, refer to 4.5.4 NANs for more information,
Status Register:
Condition Codes:
Quotient Byte:
Exception Byte:
Affected as described in 4.5.5.1 SETTING FLOATING-POiNT
CONDITION CODES
Loaded with the sign and least significant seven bits of the
quotient (FPn (+) Source). The sign of the quotient is the
exclusive OR of the sign bits of the source and destination
operands.
BSUN Cleared
SNAN Refer to 4.5.4
NANs.
OPERR Set if the source is zero, or the destination is
infinity; cleared otherwise
FREESCALE
4-86
MC68881/MC68882 USER'S MANUAL

Table of Contents