4
FSAVE
Save Internal State
(Privileged Instruction)
FSAVE
Operation:
If in supervisor state
then FPCP Internal State ~ State Frame
else TRAP
Assembler
Syntax:
FSAVE <ea>
Attributes:
Unsized, privileged.
Description:
Suspends the execution of any operation in progress, and saves the in-
ternal state in a state frame located at the effective address. After the save operation,
the FPCP is in the idle
state,
waiting for the execution of the next instruction. The first
word written to the state frame is the format word, which specifies the size of the
frame and the revision number of the FPCP. The MPU initiates the FSAVE instruction
by reading the FPCP save CIR, which is encoded with a format word that indicates the
appropriate action to be taken by the main processor. The current implementation of
the FPCP always returns one of five responses in the save CIR:
Value
$0018
$0118
$0218
$XX18
$XXB4
Definition
Save NULL state frame
Not ready, come again
Illegal, take format exception
Save IDLE state frame
Save BUSY state frame
where:
XX is the FPCP version number.
The Not Ready format word indicates that the FPCP is not prepared to perform a state
save and that the MPU should process interrupts, if necessary, and then re-read the
save CIR. The FPCP uses this format word to cause the main processor to wait while
an internal operation is completed, if possible, in order to allow an IDLE frame to be
saved rather than a BUSY frame. The Illegal format word is used to abort an FSAVE
instruction that is attempted while the FPCP is executing a previous FSAVE instruction.
All other format words cause the MPU to save the indicated state frame at the specified
address. For state frame details see 6.4.2
State Frames.
These state frames are defined
as follows:
NULL:
This state frame is four bytes long. An FSAVE instruction that generates
this size state frame indicates that the FPCP state has not been modified
since the last hardware reset or FRESTORE instruction with a NULL state
frame. This indicates that the programmer's model is in the reset state,
with nonsignaling NANs in the floating-point data registers and zeros in
the FPCR, FPSR, and FPIAR. (Thus, it is not necessary to save the pro-
grammer's model.)
FREESCALE
4-90
MC68881/MC68882 USER'S MANUAL
To Next Page