EasyManua.ls Logo

Freescale Semiconductor MC68881 - Page 149

Default Icon
409 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
FSAVE
Save Internal State
(Privileged Instruction)
FSAVE
IDLE:
This state frame is 28 ($1C) bytes long in the MC68881, and 60 ($3C) bytes
long in the MC68882. An FSAVE instruction that generates this size state
frame indicates that the FPCP was in an idle condition, waiting for the
initiation of the next instruction. Any exceptions that were pending are
saved in the frame and are then cleared internally. Thus, the pending
exceptions are not reported until after a subsequent FRESTORE instruction
loads the state frame. In addition to being used for context switching, this
frame may be used by exception handler routines, since it contains the
value of the operand that caused the last floating-point exception.
BUSY:
This state frame is 184 ($B8) bytes long in the MC68881, and 216 ($D8)
bytes long in the MC68882. An FSAVE instruction that generates this size
state frame indicates that the FPCP was at a point within an instruction
where it was necessary to save the entire internal state of the processor.
This frame size is only used when absolutely necessary because of the
large size of the frame and the amount of time required to transfer it. The
action of the FPCP when this state frame is saved is the same as for the
IDLE state frame.
The FSAVE does not save the programmer's model registers of the FPCP, but is used
to save only the user invisible portion of the machine. The FSAVE instruction may be
used with the FMOVEM instruction to perform a full context save of the FPCP including
the floating-point data registers and system control registers. In order to accomplish
a complete context save, an FSAVE instruction is first executed to suspend the current
operation and save the internal state, followed by the appropriate FMOVEM instruc-
tions to store the programmer's model. Refer to 6.4 CONTEXT SWITCHING for more
information.
Status Register:
Not affected
Instruction Format:
15 14 13 12 11 10 9 8 7 6
COPROCESSOR
1 1 1 1 ID 1 0 0
5 4 3 2 1 0
EFFECTIV~ ADDRESS
MODE | REGISTER
MC68881/MC68882 USER'S MANUAL
FREESCALE
4-91

Table of Contents