Freescale Semiconductor MC68881 - Page 177

FTRAPcc Trap Conditionally FTRAPcc
Operation: If condition true, then TRAP
Assembler FTRAPcc
Syntax: FTRAPcc.W #<data>
FTRAPcc.L #<data>
Attributes: Size = (Word, Long)
Description: If the selected condition is true, the main processor initiates exception
processing. A vector number is generated to reference the TRAPcc exception vector.
The stacked program counter points to the next instruction. If the selected condition
is not true, no operation is performed, and execution continues with the next instruc-
tion in sequence. The immediate data operand is placed in the word(s) following the
conditional predicate word and is available for user definition for use within the trap
handler.
The conditional specifier cc selects one of the 32 conditional tests defined in 4.4
CONDITIONAL TEST DEFINITIONS.
Status Register:
Condition Codes: Not affected
Quotient Byte: Not affected
Exception Byte: BSUN
Set if the NAN condition code is set and the
condition selected is an IEEE nonaware test
SNAN Not Affected
OPERR Not Affected
OVFL Not Affected
UNFL Not Affected
DZ Not Affected
INEX2 Not Affected
INEX1 Not Affected
Accrued Exception Byte: The lOP bit is set if the BSUN bit is set in the exception byte.
No other bit is affected.
Instruction Format:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
01 I 10 1 1 COPROCESSORtD.. 0 0 1 l I 1 I 1 I MODE
0 o ° t ° I 0 0 0 0 CONOm0NALPREDIDATE
16-BIT 0PERAND 0R MOST SIGNIFICANT WORD OF 32-BIT 0PERAND (IF NEEDED)
LEAST SIGNIFICANT WORD OR 32-BIT OPERAND (IF NEEDED)
MC68881/MC68882 USER'S MANUAL FREESCALE
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