Paragraph
Number
4.7.2
4.7.3
4.7.4
4.7.5
4.8
4.8.1
4.8.2
4.8.3
4.8.4
4.8.5
4.8.6
4.9
5.1
5.1.1
5.1.1.1
5.1.1.2
5.1.2
5.1.2.1
5.1.2.2
5.1.2.3
5.1.2.4
5.2
5.2.1
5.2.2
5.2.3
5.2.3.1
5.2.3.2
5.2.3.3
5.2.3.4
5.2.3.5
5.2.3.6
5.2.4
6.1
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
TABLE OF CONTENTS (Continued)
Title
Page
Number
FDBcc, FScc, and FTRAPcc Instruction Formats .........................
Conditional Branch Instruction Format ....................................
Save Instruction Format: ......................................................
Restore Instruction Format ...................................................
Instruction Format Summary .... ..................................................
Coprocessor ID Field ...........................................................
Effective Address Field ........................................................
Register/Memory Field .........................................................
4-133
4-135
4-137
4-137
4-138
4-138
4-138
4-138
Source Specifier Field
...........................................................
4-138
Destination Register Field ...................................................... 4-139
Conditional Predicate Field .................................................... " 4-139
Instruction Format Diagrams ....................................................... 4-141
Section 5
Coprocessor Programming
Applications Programming ..................................... . .................... 5-1
Concurrency ......................................... .............................. 5-1
Concurrent Integer and Floating-Point Computations ............. 5-1
Concurrent Floating-Point Computations ............................. 5-2
Optimization of Code for the MC68882 ..................................... 5-9
Unrolling Loops ............................................................. 5-9
Avoiding Register Conflicts. ............................................. 5-9
Arranging FMOVE Instructions .......................................... 5-9
Performance Improvement Example .................................. 5-10
Systems Programming ............................................................... 5-10
State Frame Sizes
................................................................
5-10
Exception Handler Code... 5-11
Processing of Special Conditions
................................
............ 5-12
Interrupts ..................................................................... 5-13
Bus Arbitration .............................................................. 5-13
Context Switching .......................................................... 5-13
Bus Errors .................................................................... 5-14
Exception Processing ...................................................... 5-14
Simultaneous Floating-Point Exception and Task
Switch Interrupt .......................................................... 5-14
Detecting Coprocessor Presence ............................................. 5-15
Section
6
Exception Processing
Coprocessor-Detected Exceptions ................................................. 6-2
Branch/Set on Unordered (BSUN) ........................................... 6-5
Signaling Not-a-Number ........................................................ 6-6
Operand Error ...... ;..: .......................................................... 6-7
Overflow ........................................................................... 6-9
Underflow ......................................................................... 6-11
Divide by Zero .................................................................... 6-14
MC68881/MC68882 USER'S MANUAL
FREESCALE
vii