Freescale Semiconductor MC68881 - Page 8

Paragraph
Number
6.1.7
6.1.8
6.1.9
6.1.10
6.1.11
6.1.12
6.1.13
6.2
6.2.1
6.2,2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.3
6.4
6.4.1
6.4.2
6.4.2.1
6.4.2.2
6.4.2.3
6.4.3
6.4.3.1
6.4.3.2
6.4.3.3
6.4.3.4
6.4.3.5
6.4.4
6.4.5
TABLE OF CONTENTS (Continued)
Page
Title Number
Inexact Result ..................................................................... 6-15
Inexact Result on Decimal Input .............................................. 6-18
Multiple Exceptions ............................................................. 6-19
IEEE Exception and Trap Compatibility ..................................... 6-19
Illegal Command Words
....................................................... 6-20
Coprocessor-Detected Protocol Violation .................................. 6-20
Recovery from Exceptions ..................................................... 6-22
Main Processor Detected Exceptions
............................................. 6-24
Trap on Coprocessor Condition Instruction ............................... 6-24
Illegal Instructions ......... : ..................................................... 6-24
Main-Processor-Detected Protocol Violations ............................. 6-25
Trace Exceptions ..................................... . ........................... 6-25
• Interrupt ............................................................................ 6-26
Address and Bus Errors ................... : .................................... 6-27
Privilege Violations .............................................................. 6-27
Format Error Exceptions ....................................................... 6-28
MC68882 Exception Handlers ...................................................... 6-28
Context Switching ..................................................................... 6-28
FSAVE and FRESTORE Instruction Overviews ............................ 6-29
State Frames ...................................................................... 6-29
Null State Frame ............................................................ 6-32
Idle State Frame ............................................................ 6-32
Busy State Frame ........................................................... 6-35
FSAVE Protocol ................................................................... 6-36
Reset Phase .................................................................. 6-37
Idle Phase .................................................................... 6-38
Initial Phase
.................................................................. 6-38
Middle Phase ................................................................ 6-38
End Phase .................................................................... 6-38
FRESTORE Protocol ............................................................. 6-38
Context Switching Summary .................................................. 6-39
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.2.9
7.2.10
7.2.11
Section 7
Coprocessor Interface
Chip-Select Decode ................................................................... 7-1
Coprocessor Interface Registers ................................................... 7-2
Response CIR ($00) .............................................................. 7-3
Control CIR ($02) ................................................................. 7-4
Save CIR ($04) .................................................................... 7-5
Restore CIR ($06)
................................................................. 7-5
Operation Word CIR ($08) ..................................................... 7-5
Command ClR ($0A) ............................................................. 7-5
Condition CIR ($0E) .............................................................. 7-6
Operand CIR ($10)
............................................................... 7-6
Register Select CIR ($14) ....................................................... 7-7
Instruction Address CIR ($18)
................................................. 7-7
Operand Address CIR ($1C) ................................................... 7-8
FREESCALE
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MC68881/MC68882 USER'S MANUAL