Maxim Integrated MAX32660 - Page 12

MAX32660 User Guide
Maxim Integrated Page 12 of 195
Table 13-4. Clock Phase and Polarity Operation ................................................................................................... 164
Table 13-5: SPI0 Master Register Addresses and Descriptions ............................................................................. 169
Table 13-6: SPI FIFO Data Registers ....................................................................................................................... 169
Table 13-7: SPI Master Signals Control Registers .................................................................................................. 169
Table 13-8: SPI Transmit Packet Size Register ....................................................................................................... 171
Table 13-9: SPI Static Configuration Registers ...................................................................................................... 171
Table 13-10: SPI Slave Select Timing Register ....................................................................................................... 172
Table 13-11: SPI Master Clock Configuration Registers ........................................................................................ 172
Table 13-12: SPI DMA Control Registers ............................................................................................................... 173
Table 13-13: SPI Interrupt Flag Registers .............................................................................................................. 174
Table 13-14: SPI Interrupt Enable Registers .......................................................................................................... 176
Table 13-15: SPI Wakeup Status Flags Registers ................................................................................................... 177
Table 13-16: SPI Wakeup Enable Registers ........................................................................................................... 177
Table 13-17: SPI Status Registers .......................................................................................................................... 177
Table 14-1: Four-Wire SPI Signals .......................................................................................................................... 179
Table 14-2: I
2
S Signals ............................................................................................................................................ 180
Table 14-3: SPIMSS Pins for SPI1 and I
2
S ............................................................................................................... 181
Table 14-4. Clock Phase and Polarity Operation ................................................................................................... 182
Table 14-5: SPIMSS Register Offsets, Access and Descriptions ............................................................................. 189
Table 14-6. SPIMSS Data Register ......................................................................................................................... 189
Table 14-7: SPIMSS Control Register ..................................................................................................................... 189
Table 14-8: SPIMSS Interrupt Flag Register ........................................................................................................... 190
Table 14-9: SPIMSS Mode Register ....................................................................................................................... 191
Table 14-10: SPIMSS Bit Rate Generator Register ................................................................................................. 192
Table 14-11: SPIMSS DMA Register ....................................................................................................................... 192
Table 14-12: SPIMSS I
2
S Control Register .............................................................................................................. 194