R&S ZNL Series - Page 1000

Command reference
R&S
®
ZNL/ZNLE
1000User Manual 1178.5966.02 ─ 20
Suffix:
<Lev>
.
Selects one of the two QUEStionable:LIMit registers; see
"STATus:QUEStionable:LIMit<1|2>" on page 636.
Parameters:
<BitPattern> Range: 0 to 65535 (decimal representation)
*RST: n/a
Example:
STAT:QUES:LIM2:ENAB 6
Set bits no. 1 and 2 of the QUEStionable:LIMit2:ENABle
register
STATus:QUEStionable[:EVENt]?
STATus:QUEStionable:INTegrity[:EVENt]?
STATus:QUEStionable:INTegrity:HARDware[:EVENt]?
STATus:QUEStionable:LIMit<Lev>[:EVENt]?
These commands return the contents of the EVENt parts of the QUEStionable,
QUEStionable:INTegrity, QUEStionable:INTegrity:HARDware, and
QUEStionable:LIMit<Lev> status registers. Reading an EVENt register clears it.
Suffix:
<Lev>
.
Selects one of the two QUEStionable:LIMit registers; see
"STATus:QUEStionable:LIMit<1|2>" on page 636.
Example:
STAT:QUES:LIM1?
Query the EVENt part of the QUEStionable:LIMit1 register
to check whether an event has occurred since the last reading.
Usage: Query only
STATus:QUEStionable:NTRansition <BitPattern>
STATus:QUEStionable:INTegrity:NTRansition <BitPattern>
STATus:QUEStionable:INTegrity:HARDware:NTRansition <BitPattern>
STATus:QUEStionable:LIMit<Lev>:NTRansition <BitPattern>
Sets the negative transition filters of the QUEStionable... status registers. If a bit is
set, a 1 to 0 transition in the corresponding bit of the associated condition register cau-
ses a 1 to be written in the associated bit of the corresponding event register.
Suffix:
<Lev>
.
Selects one of the two QUEStionable:LIMit registers; see
"STATus:QUEStionable:LIMit<1|2>" on page 636.
Parameters:
<BitPattern> Range: 0 to 65535 (decimal representation)
*RST: n/a
Example:
STAT:QUES:LIM2:NTR 6
Set bits no. 1 and 2 of the
QUEStionable:LIMit2:NTRansition register
VNA command reference