10-119
10
10.4 TIO (Input/Output-Related 16-Bit Timer)
MULTIJUNCTION TIMERS
32180 Group User’s Manual (Rev.1.0)
Figure 10.4.11 Reload 0 and Reload 1 Register Updates in PWM Output Mode
(a) When reload register updates take effect in the current period (reflected in the next period)
Count clock
Reload 0 register
Reload 1 register
H'0001 H'FFFF
H'1000
H'7FFF
H'2000
H'8000
H'9000
Counter
Interrupt due
to underflow
Timing at which reload 0 and reload 1
registers are updated
Operation by new reload value written
Reload 0 register
Reload 1 register
F/F output
Write to reload 1
Write to reload 0
(Reload 1 data latched)
H'1000
H'2000
H'8000
H'9000
Enlarged
view
Old PWM
output period
F/F output
H'7FFEH'0000
PWM period latched
Reload 1 buffer
H'2000 H'9000
New PWM
output period
New PWM
output period
Note: • This diagram does not show detailed timing information.
H'0001 H'FFFF
H'1000
H'0FFF
H'2000
H'8000
H'9000
(b) When reload register updates take effect in the next period (reflected one period later)
Operation by old reload value
H'1000
H'2000
H'8000
H'9000
H'0FFEH'0000
H'2000 H'9000
Write to reload 1
Write to reload 0
(Reload 1 data latched)
Old PWM
output period
Old PWM
output period
Old PWM
output period
Timing at which reload 0 and reload 1
registers are updated
PWM period latched
Count clock
Reload 0 register
Reload 1 register
Counter
Interrupt due
to underflow
Reload 0 register
Reload 1 register
F/F output
Enlarged
view
F/F output
Reload 1 buffer
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