18
18-5
OSCILLATOR CIRCUIT
32180 Group User's Manual (Rev.1.0)
18.1 Oscillator Circuit
18.1.3 Oscillation Drive Capability Select Function
The microcomputer incorporates a four-stage drive capability select function.
Once the oscillation of the oscillator circuit has stabilized, the XIN-XOUT drive capability can be lowered. The
lower the drive capability, the smaller the amount of power consumption.
Clock Control Register (CLKCR)
<Address: H
’0080 0786>123456b7b0
XDRVP XDRV
011
<After reset: H’03>
b Bit Name Function R W
0–4 No function assigned. Fix to "0". 00
5 XDRVP 0W
XDRV write control bit
6–7 XDRV XIN-XOUT drive capability (performance ratio) R W
XIN-XOUT drive capability select bit 00: Low 0.25
01: 0.50
10: 0.75
11: High 1.00
(1) XDRV write control bit (XDRVP) (Bit 5)
This bit controls writing to the XIN-XOUT drive capability select bits.
(2) XIN-XOUT drive capability select bits (Bits 6, 7)
The following shows the procedure for writing to these bits.
1. Set the write control bit (XDRVP) to "1".
2. Immediately following the above, reset the write control bit (XDRVP) to "0" and write the appropriate value
to the XIN-XOUT drive capability select bits.
Note: • If a write cycle to any other area occurs between 1 and 2, write to XDRV has no effect and the
written value is not reflected. Therefore, disable interrupts and DMA transfers before setting the
drive capability control bits. Note that a pair of two consecutive writes comprise a write opera-
tion.
To Next Page
Loading...
Need help?
General
