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MULTIJUNCTION TIMERS
10.8 TOU (Output-Related 24-Bit Timer)
32180 Group User’s Manual (Rev.1.0)
10.8.15 Operation in TOU Single-shot Output Mode (without Correction Function)
(1) Outline of TOU single-shot output mode
In single-shot output mode, the timer generates a pulse in width of (reload register set value + 1) only once
and then stops.
When the timer is enabled after setting the reload register, the counter is loaded with the content of the reload
register and starts counting synchronously with the count clock. The counter counts down and stops when it
underflows after reaching the minimum count.
The F/F output waveform in single-shot output mode is inverted (F/F output levels change from low to high or
vice versa) at startup and upon underflow, generating a single-shot pulse waveform in width of (reload regis-
ter set value + 1) only once. An interrupt request can be generated when the counter underflows.
The count value is (reload register set value + 1). (For counting operation, see also Section 10.3.9, “Opera-
tion of TOP Single-shot Output Mode.”)
(2) Precautions on using TOU single-shot output mode
The following describes precautions to be observed when using TOU single-shot output mode.
• If the counter stops due to an underflow in the same clock period as the timer is enabled by external input,
the former has priority so that the counter stops.
• If the counter stops due to an underflow in the same clock period as count is enabled by writing to the
enable bit, the latter has priority so that count is enabled.
• If the timer is enabled by external input in the same clock period as count is disabled by writing to the
enable bit, the latter has priority so that count is disabled.
• To read the counter on-the-fly, make sure the read timing does not coincide with an underflow of the 16
low-order bits (8 high-order bits decremented). When reading the counter on-the-fly, take the appropriate
measure to ensure that the read value is correct by, for example, reading the counter twice in succession.
• Because the timer operates synchronously with the count clock, a count clock-dependent delay is in-
cluded before F/F output is inverted after the timer is enabled.
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