10
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MULTIJUNCTION TIMERS
10.2 Common Units of Multijunction Timers
32180 Group User’s Manual (Rev.1.0)
10.2.3 Clock Bus and Input/Output Event Bus Control Unit
(1) Clock bus
The clock bus is provided for supplying clock to each timer, and is comprised of four lines of clock bus 0–3.
Each timer can use these clock bus signals as clock input signals. The table below lists the signals that can
be fed into the clock bus.
Table 10.2.1 Acceptable Clock Bus Signals
Clock Bus Acceptable Signal
3 TCLK0 input
2 Internal prescaler (PRS2) or TCLK3 input
1 Internal prescaler (PRS1)
0 Internal prescaler (PRS0)
(2) Input event bus
The input event bus is provided for supplying a count enable signal or measure capture signal to each timer,
and is comprised of four lines of input event bus 0–3. Each timer can use these input event bus signals as
enable (or capture) input. Furthermore, they can also be used as request signals to start A-D conversion or
DMA transfer.
The table below lists the signals that can be fed into the input event bus.
Table 10.2.2 Connectable (Acceptable) Input Event Bus Signals
Input Event Bus Connectable (Acceptable) Signal (Note 1)
3 TIN3 input, output event bus 2 or TIO7 underflow signal
2 TIN0 input, TIN2 input or TIN4 input
1 TIO6 underflow signal
0 TIO5 underflow signal
Note 1: For the destination (output) to which the input event bus signals are connected, see Figure 10.1.1, “Block Diagram of MJT.”
(3) Output event bus
The output event bus has the underflow signal from each timer connected to it, and is comprised of four lines
of output event bus 0–3. Output event bus signals are connected to output flip-flops, and can also be con-
nected to the A-D converter and DMAC. Furthermore, output event bus 2 can be connected to input event
bus 3.
The table below lists the signals that can be connected to the output event bus.
Table 10.2.3 Connectable (Acceptable) Output Event Bus Signals
Input Event Bus Connectable (Acceptable) Signal (Note 1)
3 TOP8, TIO3, TIO4 or TIO8 underflow signal
2 TOP9 or TIO2 underflow signal
1 TOP7 or TIO1 underflow signal
0 TOP6 or TIO0 underflow signal
Note 1: For the destination (output) to which the output event bus signals are connected, see Figure 10.1.1, “Block Diagram
of MJT.”
Note that the signals from each timer to the output event bus (and TIO5, 6 signals to the input event bus) are
generated with the timing shown in Table 10.2.4, and not the timing at which signals are output from the timer
to the output flip-flop.
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