Allen-Bradley SLC 500

QUICKDESIGNER DeviceNet •
••
• 89
Word Addressing Layout
IW0
IW1
IW2
IW3
IW4
IW5
IW125
IW126
ID0
ID1
ID2
ID125
WORDDWORD
QW0
QW1
QW2
QW3
QW4
QW5
QW125
QW126
QD0
QD1
QD2
QD125
WORDDWORD
For the combination of a W, DW, W, the following example shows the layout.
IW0
IW1
IW2
IW3
IW4
IW0
WORD
QW0
QW1
QW2
QW3
QW4
QW0
WORD
ID1
IW3
QD1
QW3
More Examples
Format Example Byte Addressing Description Word Addressing Description
Iaa.b ** I37.7 Input bit 7 of byte 37 (LSB of
word 18)
n/a
Qaa.b ** Q37.7 Output bit 7 of byte 37 (LSB of
word 18)
n/a
IBaa.b IB37 Input byte at byte 37 (LSB of
word 18)
n/a
QBaa.b QB37 Output byte at byte 37 (LSB of
word 18)
n/a
IWaa.bb IW37 Input word starting at byte 37
(LSB of word 18)
Input word starting at word 37 (byte 74)
QWaa.bb QW37 Output word starting at byte 37
(LSB of word 18)
Output word starting at word 37 (byte 74)
IDaa.bb ID37 Input Dword starting at byte 37
(LSB of word 18)
Input Dword starting at word 37 (byte 74)
QDaa.bb QD37 Output Dword starting at byte
37 (LSB of word 18)
Output Dword starting at word 37 (byte 74)