Moog ACV with CANopen bus interface 5 Device control
Device state machine (DSM)
B99224-DV018-D-211, Rev. A, October 2018 49
5.2.2 State transitions
State transitions are caused by
• The control word #ControlWord#
• Enable signal (digital input 0)
• Internal events
5.2.2.1 DSM state transitions caused by the control word
The following table lists the transitions depending on the #ControlWord#.
Chapter "5.2 Device state machine (DSM)", page 46
The device control commands, which cause a state transition, are formed by the four low-order bits of the
#ControlWord#.
Chapter "5.1 Local mode", page 43
Every transition between the actual state and the requested state will be processed.
Transition (TR) Control Word
Control word bit Comments/Conditions
76543210
RMHD
TR2 Activate 'DISABLED' xxxxxxx1
TR3 Activate 'HOLD' xxxxxx11Depending on enable signal
Chapter "5.2.2.4 Enable behavior",
page 50
TR4 Activate 'ACTIVE' xxxxx111Depending on enable signal
Chapter "5.2.2.4 Enable behavior",
page 50
TR5 Deactivate 'ACTIVE xxxxx0xX
TR6 Deactivate 'HOLD' xxxxx00X
TR7 Deactivate 'DISABLED' xxxxx000
TR10 Reset 'FAULT_DISABLED' xxxx0001This transition is executed if the reset
bit changes from 0 to 1 (rising edge) or
the enable signal toggles from 0 to 1.
Chapter "5.2.2.4 Enable behavior",
page 50
Behavior of error output pin:
Chapter "5.2.2.5 Error output pin",
page 52
change to
xxxx1001
TR11 Reset 'FAULT_HOLD' xxxx0011This transition is executed if the reset
bit changes from 0 to 1 (rising edge) or
the enable signal toggles from 0 to 1.
Chapter "5.2.2.4 Enable behavior",
page 50
Behavior of error output pin:
Chapter "5.2.2.5 Error output pin",
page 52
change to
xxxx1011
TR14 Reset 'FAULT_INIT' xxxx0000This transition is executed if the reset
bit changes from 0 to 1 (rising edge) or
the enable signal toggles from 0 to 1.
Chapter "5.2.2.4 Enable behavior",
page 50
Behavior of error output pin:
Chapter "5.2.2.5 Error output pin",
page 52
change to
xxxx1000
TR15 'FAULT_HOLD' to
'FAULT_DISABLED'
xxxxx001
TR16 'FAULT_DISABLED' to
'FAULT_INIT'
xxxxx000