Renesas M32R/ECU Series - Page 61

3
3-10
ADDRESS SPACE
3.4 Internal RAM and SFR Areas
32180 Group User’s Manual (Rev.1.0)
SFR Area Register Map (3/27)
Address +0 address +1 address See pages
b0 b7 b8 b15
H'0080 0116 SIO0 Receive Control Register SIO0 Baud Rate Register 12-20
(S0RCNT) (S0BAUR) 12-23
(Use inhibited area)
H'0080 0120 SIO1 Transmit Control Register SIO1 Transmit/Receive Mode Register 12-14
(S1TCNT) (S1MOD) 12-15
H'0080 0122 SIO1 Transmit Buffer Register 12-18
(S1TXB)
H'0080 0124 SIO1 Receive Buffer Register 12-19
(S1RXB)
H'0080 0126 SIO1 Receive Control Register SIO1 Baud Rate Register 12-20
(S1RCNT) (S1BAUR) 12-23
(Use inhibited area)
H'0080 0130 SIO2 Transmit Control Register SIO2 Transmit/Receive Mode Register 12-14
(S2TCNT) (S2MOD) 12-15
H'0080 0132 SIO2 Transmit Buffer Register 12-18
(S2TXB)
H'0080 0134 SIO2 Receive Buffer Register 12-19
(S2RXB)
H'0080 0136 SIO2 Receive Control Register SIO2 Baud Rate Register 12-20
(S2RCNT) (S2BAUR) 12-23
(Use inhibited area)
H'0080 0140 SIO3 Transmit Control Register SIO3 Transmit/Receive Mode Register 12-14
(S3TCNT) (S3MOD) 12-15
H'0080 0142 SIO3 Transmit Buffer Register 12-18
(S3TXB)
H'0080 0144 SSIO3 Receive Buffer Register 12-19
(S3RXB)
H'0080 0146 SIO3 Receive Control Register SIO3 Baud Rate Register 12-20
(S3RCNT) (S3BAUR) 12-23
(Use inhibited area)
H'0080 0180 CS0 Area Wait Control Register CS1 Area Wait Control Register 16-4
(CS0WTCR) (CS1WTCR)
H'0080 0182 CS2 Area Wait Control Register CS3 Area Wait Control Register 16-4
(CS2WTCR) (CS3WTCR)
(Use inhibited area)
H'0080 01E0 Flash Mode Register Flash Status Register 1 6-4
(FMOD) (FSTAT1) 6-5
H'0080 01E2 Flash Control Register 1 Flash Control Register 2 6-7
(FCNT1) (FCNT2) 6-8
H'0080 01E4 Flash Control Register 3 Flash Control Register 4 6-9
(FCNT3) (FCNT4)
H'0080 01E6 (Use inhibited area)
H'0080 01E8 Virtual Flash S Bank Register 0 6-11
(FESBANK0)
H'0080 01EA Virtual Flash S Bank Register 1 6-11
(FESBANK1)
H'0080 01EC Virtual Flash S Bank Register 2 6-11
(FESBANK2)
H'0080 01EE Virtual Flash S Bank Register 3 6-11
(FESBANK3)
H'0080 01F0 Virtual Flash S Bank Register 4 6-11
(FESBANK4)
H'0080 01F2 Virtual Flash S Bank Register 5 6-11
(FESBANK5)
H'0080 01F4 Virtual Flash S Bank Register 6 6-11
(FESBANK6)
H'0080 01F6 Virtual Flash S Bank Register 7 6-11
(FESBANK7)
(Use inhibited area)
H'0080 0200 (Use inhibited area) Clock Bus & Input Event Bus Control Register 10-16
(CKIEBCR)
H'0080 0202 Prescaler Register 0 Prescaler Register 1 10-12
(PRS0) (PRS1)
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