Appendix 4
Appendix 4-3
32180 Group User's Manual (Rev. 1.0)
SUMMARY OF PRECAUTIONS
Appendix 4.2 Precautions about the Address Space
Appendix 4.2.1 Virtual Flash Emulation Function
The microcomputer has the function to map 4-Kbyte memory blocks beginning with the address H’0080 8000
into areas (S banks) of the internal flash memory that are divided in 4-Kbyte units. This functions is referred to as
the virtual flash emulation function.
This function allows the data located in 4-Kbyte blocks of the internal RAM to be changed with the flash memory
contents at the addresses specified by the Virtual Flash Bank Register. For details about this function, see
Section 6.6, “Virtual Flash Emulation Function.”
Appendix 4.3 Precautions about EIT
The Address Exception (AE) requires caution because if one of the instructions that use “register indirect + regis-
ter update” addressing mode (following three instructions) generates an address exception when it is executed,
the values of the registers to be automatically updated (Rsrc and Rsrc2) become undefined.
Except that the values of Rsrc and Rsrc2 become undefined, these instructions behave the same way as when
used in other addressing modes.
• Applicable instructions
LD Rdest, @Rsrc+
ST Rsrc1, @–Rsrc2
ST Rsrc1, @+Rsrc2
If the above case applies, consider the fact that the register values become undefined when you design the
processing to be performed after executing said instructions. (If an address exception occurs, it means that the
system has some fatal fault already existing in it. Therefore, address exceptions must be used on condition that
control will not be returned from the address exception handler to the program that was being executed when the
exception occurred.)
Appendix 4.4 Precautions To Be Observed when Programming Internal Flash Memory
The following describes precautions to be taken when programming/erasing the internal flash memory.
• When the internal flash memory is programmed or erased, a high voltage is generated internally. Because mode
transitions during programming/erase operation may cause the chip to break down, make sure the mode setting
pin/power supply voltages do not fluctuate to prevent unintended changes of modes.
• If the system uses any pins that are to be used by a general-purpose programming/erase tool, care must be
taken to prevent adverse effects on the system when the tool is connected.
• If the internal flash memory needs to be protected while using a general-purpose programming/erase tool, set
any ID in the flash memory protect ID verification area (H’0000 0084 to H’0000 008F).
• If the internal flash memory does not need to be protected while using a general-purpose programming/erase
tool, fill the entire flash memory protect ID verification area (H’0000 0084 to H’0000 008F) with H’FF.
• If the Flash Status Register 2 (FSTAT2)’s each error status is to be cleared (initialized to H’80) by resetting the
Flash Control Register 4 (FCNT4) FRESET bit, check to see that the Flash Status Register 1 (FSTAT1) FSTAT bit
= "1" (ready) before clearing the error status.
• Before resetting the Flash Control Register 1 (FCNT1) FENTRY bit from "1" to "0", check to see that the Flash Status
Register 1 (FSTAT1) FSTAT bit = "1" (ready) or the Flash Status Register 2 (FSTAT2) FBUSY bit = "1" (ready).
• Do not clear the FENTRY bit if the Flash Status Register 1 (FSTAT1) FSTAT bit = "0" (busy) or the Flash Status
Register 2 (FSTAT2) FBUSY bit = "0" (being programmed or erased).
Appendix 4.2 Precautions about the Address Space
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