Basler BE1-951 - Page 212

ii BE1-951 Application 9328900990 Rev L
Alarm Latch and Pseudo Target Using the ARSTKEY Logic Variable ............................................ 8-49
Under Frequency Load Shedding with Restoration Permissive....................................................... 8-50
BE1-951 Logic Equations and Settings, Underfrequency Load Shedding....................................... 8-53
Close Circuit Monitor........................................................................................................................ 8-55
High-Speed Reclose ........................................................................................................................ 8-56
Block Load Tap Changer.................................................................................................................. 8-56
Block Neutral and Negative-Sequence Protection........................................................................... 8-56
Setting Group Selection ................................................................................................................... 8-57
Output Contact Seal-In..................................................................................................................... 8-57
Figures
Figure 8-1. BASIC-OC One-Line Drawing................................................................................................. 8-6
Figure 8-2. BASIC-OC Logic Diagram....................................................................................................... 8-7
Figure 8-3. OC-W-79 One-Line Drawing................................................................................................. 8-13
Figure 8-4. OC-W-79 Logic Diagram.......................................................................................................8-14
Figure 8-5. OC-W-CTL One-Line Diagram.............................................................................................. 8-20
Figure 8-6. OC-W-CTL Logic Diagram.................................................................................................... 8-21
Figure 8-7. FDR-W-IL One-Line Diagram................................................................................................ 8-29
Figure 8-8. FDR-W-IL Logic Diagram...................................................................................................... 8-30
Figure 8-9. Device Interconnection for Integrated Protection System..................................................... 8-32
Figure 8-10. BUS One-Line Diagram ...................................................................................................... 8-38
Figure 8-11. BUS Logic Diagram............................................................................................................. 8-39
Figure 8-12. BACKUP One-Line Diagram............................................................................................... 8-44
Figure 8-13. BACKUP Logic Diagram ..................................................................................................... 8-45
Figure 8-14. Trip Circuit Continuity and Voltage Monitor ........................................................................ 8-47
Figure 8-15. Station One-Line Drawing...................................................................................................8-48
Figure 8-16. Transformer Protection Output Latch, ARSTKEY and TRSTKEY...................................... 8-48
Figure 8-17. Underfrequency Load Shed Bus Level Application ............................................................8-51
Figure 8-18. Underfrequency Load Shed, Circuit Level Application, Manual or Auto Close from SCADA or
Local Restore ...................................................................................................................................
8-52
Figure 8-19. Close Circuit Monitor Logic ................................................................................................. 8-55
Figure 8-20. High-Speed Reclose Interlock Logic................................................................................... 8-56
Figure 8-21. Output Seal-In Logic Diagram.............................................................................................8-58
Tables
Table 8-1. BASIC-OC Contact Sensing Input Logic.................................................................................. 8-3
Table 8-2. BASIC-OC Function Block Logic.............................................................................................. 8-3
Table 8-3. BASIC-OC Virtual Switch Logic................................................................................................ 8-5
Table 8-4. BASIC-OC Virtual Output Logic ............................................................................................... 8-5
Table 8-5. OC-W-79 Contact Sensing Input Logic.................................................................................. 8-10
Table 8-6. OC-W-79 Function Block Logic..............................................................................................8-10
Table 8-7. OC-W-79 Virtual Switch Logic................................................................................................ 8-11
Table 8-8. OC-W-79 Virtual Output Logic................................................................................................ 8-12
Table 8-9. OC-W-CTL Contact Sensing Input Logic ............................................................................... 8-17
Table 8-10. OC-W-CTL Function Block Logic.........................................................................................8-17
Table 8-11. OC-W-CTL Virtual Switch Logic...........................................................................................8-18
Table 8-12. OC-W_CTL Virtual Output Logic.......................................................................................... 8-19
Table 8-13. FDR-W-IL Contact Sensing Input Logic............................................................................... 8-25
Table 8-14. FDR-W-IL Function Block Logic........................................................................................... 8-25
Table 8-15. FDR-W-IL Virtual Switch Logic............................................................................................. 8-26
Table 8-16. FDR-W-IL Virtual Output Logic ............................................................................................ 8-27
Table 8-17. BUS Contact Sensing Input Logic........................................................................................ 8-35
Table 8-18. BUS Function Block Logic.................................................................................................... 8-35
Table 8-19. BUS Virtual Switch Logic...................................................................................................... 8-36
Table 8-20. BUS Virtual Output Logic ..................................................................................................... 8-37
Table 8-21. BACKUP Contact Sensing Input Logic ................................................................................ 8-40
Table 8-22. BACKUP Function Block Logic ............................................................................................ 8-41
Table 8-23. BACKUP Virtual Switch Logic..............................................................................................8-42
Table 8-24. BACKUP Virtual Output Logic.............................................................................................. 8-43
Table 8-25. Miscellaneous Logic Expressions ........................................................................................ 8-47