Intel Cyclone 10 GX User Manual

Figure 80. RX FIFO Basic Mode Operation
64’d0 64’d1 64’d2 64’d3 64’d4
64’d5 64’d6 64’d7 64’d8 64’d9 64’ha
rx_clkout (write side)
rx_coreclkin (read side)
rx_parallel_data[63:0]
rx_digitalreset
rx_enh_read_en
rx_fifo_pfull
rx_fifo_empty
rx_fifo_pempty
If you are using even gear ratios, the rx_enh_data_valid signal is always high. For
uneven gear ratios, rx_enh_data_valid toggles. RX parallel data is valid when
rx_enh_data_valid is high. Discard invalid RX parallel data when the
rx_enh_datavalid signal is low.
Register and Fast Register Mode
This FIFO mode is used for protocols, which require deterministic latency. You can tie
tx_fifo_wr_en to 1.
2.9.1.5. TX Data Bitslip
The bit slip feature in the TX gearbox allows you to slip the transmitter bits before
they are sent to the serializer.
The value specified on the TX bit slip bus indicates the number of bit slips. The
minimum slip is one UI. The maximum number of bits slipped is equal to the FPGA
fabric-to-transceiver interface width minus 1. For example, if the FPGA fabric-to-
transceiver interface width is 64 bits, the bit slip logic can slip a maximum of 63 bits.
Each channel has 6 bits to determine the number of bits to slip. The TX bit slip bus is
a level-sensitive port, so the TX serial data is bit slipped statically by TX bit slip port
assignments. Each TX channel has its own TX bit slip assignment and the bit slip
amount is relative to the other TX channels. You can improve lane-to-lane skew by
assigning TX bit slip ports with proper values.
The following figure shows the effect of slipping tx_serial_data[0] by one UI to
reduce the skew with tx_serial_data[1]. After the bit slip, tx_serial_data[0]
and tx_serial_data[1] are aligned.
Figure 81. TX Bit Slip
tx_serial_clock
tx_enh_bitslip[0]
tx_serial_data[0] (Before)
tx_enh_bitslip[0]
tx_serial_data[0] (After)
tx_serial_data[1]
0000000
0000001
1 UI
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English