Intel Cyclone 10 GX User Manual

Table 115. Avalon-MM Interface Signals
Signal Name Direction Width Description
csr_address
Input 11 Use this bus to specify the register address to read
from or write to. The width is:
• 11 bits for 10M/100M/1G/2.5G/5G/10G
(USXGMII) configurations.
csr_read
Input 1 Assert this signal to request a read operation.
csr_readdata
Output 32 Data read from the specified register. The data is
valid only when the csr_waitrequest signal is
deasserted. The width is:
• 32 bits for 10M/100M/1G/2.5G/5G/10G
(USXGMII) configurations. The upper 16 bits
are reserved.
csr_write
Input 1 Assert this signal to request a write operation.
csr_writedata
Input 32 Data to be written to the specified register. The
data is written only when the csr_waitrequest
signal is deasserted. The width is:
• 32 bits for 10M/100M/1G/2.5G/5G/10G
(USXGMII) configurations. The upper 16 bits
are reserved.
csr_waitrequest
Output 1 When asserted, indicates that the PHY is busy and
not ready to accept any read or write requests.
• When you have requested for a read or write,
keep the control signals to the Avalon-MM
interface constant while this signal is asserted.
The request is complete when it is deasserted.
• This signal can be high or low during idle cycles
and reset. Therefore, the user application must
not make any assumption of its assertion state
during these periods.
2.6.4. XAUI PHY IP Core
Information about this IP core will be available in a future release of this user guide.
2.6.5. Acronyms
Table 116. Ethernet Acronyms
Acronym Definition
AN Auto-Negotiation in Ethernet as described in Clause 73 of IEEE 802.3ap-2007.
BER Bit Error Rate.
DME Differential Manchester Encoding.
FEC Forward error correction.
GMII Gigabit Media Independent Interface.
KR Short hand notation for Backplane Ethernet with 64b/66b encoding.
LD Local Device.
LT Link training in backplane Ethernet Clause 72 for 10GBASE-KR and 40GBASE-KR4.
LP Link partner, to which the LD is connected.
continued...
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English