Intel Cyclone 10 GX User Manual

8.5.1. CTLE Settings
8.5.1.1. XCVR_C10_RX_ONE_STAGE_ENABLE
Pin planner or Assignment Editor Name
Receiver High Data Rate Mode Equalizer
Description
Selects between the CTLE high gain mode or CTLE high data rate mode for the
equalizer. If no assignment is made, S1_MODE is chosen by default.
Table 217. Available Options
Value in QSF Value in Assignment
Editor
Description
NON_S1_MODE Off Selects high gain mode.
S1_MODE On Selects high data rate mode.
Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_C10_RX_ONE_STAGE_ENABLE
<value> -to <rx_serial_data pin name>
8.5.1.2. XCVR_C10_RX_EQ_DC_GAIN_TRIM
Pin planner or Assignment Editor Name
Receiver High Gain Mode Equalizer DC Gain Control
Description
Controls the DC gain of the continuous time linear equalizer (CTLE) in high gain mode.
A higher gain setting results in a larger DC gain.
For RX_LINK=SR, the default value is STG2_GAIN7.
For PCIe, default value is NO_DC_GAIN.
Table 218. Available Options
Value in TTK Value in Assignment Editor / qsf Description
DC Gain 0 NO_DC_GAIN No DC gain
DC Gain 1 STG1_GAIN7 Equalizer DC gain setting 6
DC Gain 2 STG2_GAIN7 Equalizer DC gain setting 13
DC Gain 3 STG3_GAIN7 Equalizer DC gain setting 20
DC Gain 4 STG4_GAIN7 Equalizer DC gain setting 27
8. Analog Parameter Settings
UG-20070 | 2018.09.24
Send Feedback
Intel
®
Cyclone
®
10 GX Transceiver PHY User Guide
391

Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English