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Intel Cyclone 10 GX

Intel Cyclone 10 GX
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Syntax
set_instance_assignment -name XCVR_C10_TX_VOD_OUTPUT_SWING_CTRL
<value> -to <tx_serial_data pin name>
Related Information
Cyclone 10 GX Pre-Emphasis and Output Swing Settings
8.9. Dedicated Reference Clock Settings
8.9.1. XCVR_C10_REFCLK_TERM_TRISTATE
Pin planner or Assignment Editor Name
Dedicated Reference Clock Pin Termination
Description
Specifies if the termination for dedicated reference clock pin is tri-stated. It defaults to
TRISTATE_OFF for non-HCSL cases.
Table 236. Available Options
Value Description
TRISTATE_OFF Internal termination enabled and on-chip biasing circuitry enabled
TRISTATE_ON Internal termination tri-stated. Off-chip termination and biasing circuitry must be implemented
Table 237. Rules
I/O Standard Value
HCSL TRISTATE_ON
CML TRISTATE_OFF
LVPECL TRISTATE_OFF
LVDS TRISTATE_OFF
Assign To
Reference clock pin.
Syntax
set_instance_assignment -name XCVR_C10_REFCLK_TERM_TRISTATE
<value> -to <dedicated refclk pin name>
8.9.2. XCVR_C10_TX_XTX_PATH_ANALOG_MODE
Pin planner or Assignment Editor Name
Transmitter Analog Presets
8. Analog Parameter Settings
UG-20070 | 2018.09.24
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Intel
®
Cyclone
®
10 GX Transceiver PHY User Guide
401

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