1.2.3. Transceiver Phase-Locked Loops
Each transceiver channel in Intel Cyclone 10 GX devices has direct access to three
types of high performance PLLs:
• Advanced Transmit (ATX) PLL
• Fractional PLL (fPLL)
• Channel PLL / Clock Multiplier Unit (CMU) PLL
These transceiver PLLs along with the Master or Local Clock Generation Blocks (CGB)
drive the transceiver channels.
Related Information
PLLs on page 200
1.2.3.1. Advanced Transmit (ATX) PLL
An advanced transmit (ATX ) PLL is a high performance PLL that only supports integer
frequency synthesis. The ATX PLL is the transceiver channel’s primary transmit PLL. It
can operate over the full range of supported data rates required for high data rate
applications.
Related Information
ATX PLL on page 201
1.2.3.2. Fractional PLL (fPLL)
A fractional PLL (fPLL) is an alternate transmit PLL that generates clock frequencies for
up to 12.5 Gbps data rate applications. fPLLs support both integer frequency synthesis
and fine resolution fractional frequency synthesis. Unlike the ATX PLL, the fPLL can
also be used to synthesize frequencies that can drive the core through the FPGA fabric
clock networks.
Related Information
fPLL on page 203
1.2.3.3. Channel PLL (CMU/CDR PLL)
A channel PLL resides locally within each transceiver channel. Its primary function is
clock and data recovery in the transceiver channel when the PLL is used in clock data
recovery (CDR) mode. The channel PLLs of channel 1 and 4 can be used as transmit
PLLs when configured in clock multiplier unit (CMU) mode. The channel PLLs of
channel 0, 2, 3, and 5 cannot be configured in CMU mode and therefore cannot be
used as transmit PLLs.
Related Information
CMU PLL on page 206
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10 GX Transceiver PHY Overview
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