Parameter Value Description
Pre-Emphasis First Post-Tap
Polarity
Fir_post_1t_neg
Fir_post_1t_pos
Selects the polarity of the first post-tap for pre-
emphasis
Pre-Emphasis First Post-Tap
Magnitude
0-25
(17)
Selects the magnitude of the first post-tap for pre-
emphasis.
Pre-Emphasis Second Post-
Tap Polarity
Fir_post_2t_neg
Fir_post_2t_pos
Selects the polarity of the second post-tap for pre-
emphasis.
Pre-Emphasis Second Post-
Tap Magnitude
0-12
(18)
Selects the magnitude of the second post-tap for
pre-emphasis
Slew Rate Control
slew_r0 to slew_r5
Selects the slew rate of the TX output signal. Valid
values span from slowest to the fastest rate.
High-Speed Compensation Enable/Disable Enables the power-distribution network (PDN)
induced inter-symbol interference (ISI)
compensation in the TX driver. When enabled, it
reduces the PDN induced ISI jitter, but increases
the power consumption.
On-Chip termination
r_r1
r_r2
Selects the on-chip TX differential termination.
RX Analog PMA Settings
Override Intel-recommended
Default settings
On/Off Enables the option to override the Intel-
recommended settings for one or more RX analog
parameters
CTLE (Continuous Time
Linear Equalizer) mode
non_s1_mode Selects the RX high gain mode non_s1_mode for
the Continuous Time Linear Equalizer (CTLE).
DC gain control of high gain
mode CTLE
No_dc_gain to stg4_gain7
Selects the DC gain of the Continuous Time Linear
Equalizer (CTLE) in high gain mode
AC Gain Control of High Gain
Mode CTLE
radp_ctle_acgain_4s_0 to
radp_ctle_acgain_4s_28
Selects the AC gain of the Continuous Time Linear
Equalizer (CTLE) in high gain mode when CTLE is
in manual mode.
Variable Gain Amplifier
(VGA) Voltage Swing Select
radp_vga_sel_0 to
radp_vga_sel_4
Selects the Variable Gain Amplifier (VGA) output
voltage swing.
On-Chip termination
R_ext0, r_r1, r_r2
Selects the on-chip RX differential termination.
Table 38. Generation Options
Parameter Value Description
Generate parameter
documentation file
On/Off When you turn on this option, generation produces a Comma-
Separated Value (.csv ) file with descriptions of the Transceiver
Native PHY IP parameters.
(17)
For more information refer to Available Options table in the
XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP section of the Analog Parameter
Settings chapter.
(18)
For more information refer to Available Options table in the
XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP section of the Analog Parameter
Settings chapter.
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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