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Anritsu MT1000A - Page 537

Anritsu MT1000A
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Priority 1
Priority 2
Domain number
Clock class
Slave only mode
Time source
Encapsulation
Announce receipt timeout
Clock accuracy
Clock step mode
Announce interval
Sync interval
Minimum delay request interval
IEEE 1588 clock results:
Clock state
Announce count
Sync count
Follow-up count
Delay request count
Delay response count
Delay follow-up count
Peer delay request/response/response-follow-up counters
Maximum/Minimum/Average offset
Maximum/Minimum/Average offset deviation
Maximum/Minimum/Average offset variance
Maximum/Minimum/Average mean path delay
Maximum/Minimum/Average peer mean path delay
Maximum/Minimum/Average path delay variation
UTC time offset
With a GPS signal present, the offset from UTC time is calculated.
Parent clock results:
Identity and Port number.
Grand-master results:
Identity
Class
Accuracy
Priority 1
Priority 2
Announced- and observed offset variance.
Foreign master clock results (up to five clocks per port):
Identity
Port number and Announce count
The following IEEE 1588 events are counted and logged:
Clock state transitions
State transition events
Measurement FunctionalityMeasurement Functionality
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