Intel Cyclone 10 GX

2.10.1.2. How to Use NativeLink to Run a ModelSim RTL Simulation
Figure 115. NativeLink Simulation Flow Diagram
Specify EDA Simulator &
Simulator Directory
Run RTL Functional or
Gate-Level Simulation
Debug Design &
Make RTL Changes
Does
Simulation Give
Expected Results?
Yes
Does
Simulation Give
Expected Results?
No
Simulation Complete
No
Run Quartus Prime
Analysis and Elaboration
Define Control Signals Using
In-System Sources & Probes
Run Simulation
Does
Simulation Give
Expected Results?
Yes
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
Send Feedback
Intel
®
Cyclone
®
10 GX Transceiver PHY User Guide
189